HD6413008VF25 Datasheet, PDF (441/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

13. Smart Card Interface
The register settings and examples of starting character waveforms are shown below for two smart
cards, one following the direct convention and one the inverse convention.
1. Direct Convention (SDIR = SINV = O/E = 0)
(Z) A Z Z A Z Z Z A A Z (Z) State
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
With the direct convention type, the logic 1 level corresponds to state Z and the logic 0 level to
state A, and transfer is performed in LSB-first order. In the example above, the first character
data is H'3B. The parity bit is 1, following the even parity rule designated for smart cards.
2. Inverse Convention (SDIR = SINV = O/E = 1)
(Z) A Z Z A A A A A A Z (Z) State
Ds D7 D6 D5 D4 D3 D2 D1 D0 Dp
With the inverse convention type, the logic 1 level corresponds to state A and the logic 0 level
to state Z, and transfer is performed in MSB-first order. In the example above, the first
character data is H'3F. The parity bit is 0, corresponding to state Z, following the even parity
rule designated for smart cards.
In the H8/3008, inversion specified by the SINV bit applies only to the data bits, D7 to D0. For
parity bit inversion, the O/E bit in SMR must be set to odd parity mode. This applies to both
transmission and reception.
Rev.4.00 Aug. 20, 2007 Page 395 of 638
REJ09B0395-0400