HD6413008VF25 Datasheet, PDF (273/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8. 16-Bit Timer
Timing of Setting of IMFA and IMFB by Input Capture: IMFA and IMFB are set to 1 by an
input capture signal. The 16TCNT contents are simultaneously transferred to the corresponding
general register. Figure 8.34 shows the timing.
φ
Input capture
signal
IMF
16TCNT
N
GR
N
IMI
Figure 8.34 Timing of Setting of IMFA and IMFB by Input Capture
Rev.4.00 Aug. 20, 2007 Page 227 of 638
REJ09B0395-0400