HD6413008VF25 Datasheet, PDF (618/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Appendix B Internal I/O Registers
TCSR—Timer Control/Status Register
H'FFF8C
WDT
Bit
7
6
5
4
OVF
WT/IT
TME
⎯
Initial value
0
0
0
1
Read/Write R/(W)*
R/W
R/W
⎯
3
2
1
0
⎯
CKS2
CKS1
CKS0
1
0
0
0
⎯
R/W
R/W
R/W
Clock select 2 to 0
CKS2 CKS1 CKS0 Description
0 φ/2
0
1 φ/32
0
0 φ/64
1
1 φ/128
0 φ/256
0
1 φ/512
1
0 φ/2048
1
1 φ/4096
Timer enable
Timer disabled:
0
TCNT is initialized to H'00 and halted
Timer enabled:
1
TCNT starts counting up
Timer mode select
Interval timer:
0 _{requests interval timer interrupts}
Watchdog timer:
1 _{generates a reset signal}
Overflow flag
[Clearing condition]
0 Read OVF when OVF = 1, then write 0 in OVF
[Setting condition]
1
TCNT changes from H'FF to H'00
Note: * Only 0 can be written to clear the flag.
Rev.4.00 Aug. 20, 2007 Page 572 of 638
REJ09B0395-0400