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| HD6413008VF25 Datasheet, PDF (224/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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8. 16-Bit Timer
Each channel has two compare match/input capture interrupts and an overflow interrupt. All
interrupts can be requested independently.
⢠Output triggering of programmable timing pattern controller (TPC)
Compare match/input capture signals from channels 0 to 2 can be used as TPC output triggers.
Table 8.1 summarizes the 16-bit timer functions.
Table 8.1 16-bit timer Functions
Item
Clock sources
General registers (output
compare/input
capture registers)
Input/output pins
Counter clearing function
Initial output value setting
function
Compare match 0
output
1
Toggle
Input capture function
Synchronization
PWM mode
Phase counting mode
Interrupt sources
Channel 0
Channel 1
Channel 2
Internal clocks: Ï, Ï/2, Ï/4, Ï/8
External clocks: TCLKA, TCLKB, TCLKC, TCLKD, selectable
independently
GRA0, GRB0
GRA1, GRB1
GRA2, GRB2
TIOCA0, TIOCB0
GRA0/GRB0
compare match or
input capture
Available
TIOCA1, TIOCB1
GRA1/GRB1
compare match or
input capture
Available
TIOCA2, TIOCB2
GRA2/GRB2
compare match or
input capture
Available
Available
Available
Available
Available
Available
Available
Not available
Three sources
⢠Compare
match/input
capture A0
⢠Compare
match/input
capture B0
⢠Overflow
Available
Available
Available
Available
Available
Available
Not available
Three sources
⢠Compare
match/input
capture A1
⢠Compare
match/input
capture B1
⢠Overflow
Available
Available
Not available
Available
Available
Available
Available
Three sources
⢠Compare
match/input
capture A2
⢠Compare
match/input
capture B2
⢠Overflow
Rev.4.00 Aug. 20, 2007 Page 178 of 638
REJ09B0395-0400
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