HD6413008VF25 Datasheet, PDF (194/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

7. I/O Ports
7.3 Port 6
7.3.1 Overview
Port 6 is an 8-bit input/output port that is also used for input and output of bus control signals
(LWR, HWR, RD, AS, BACK, BREQ, WAIT) and for clock (φ) output.
The port 6 pin configuration is shown in figure 7.2.
See table 7.5 for the selection of the pin functions.
Pins in port 6 can drive one TTL load and a 90-pF capacitive load. They can also drive a
darlington transistor pair.
Port 6
Port 6 pins
P6 ₇ / φ
P6 ₆ / LWR
P6 ₅ / HWR
P6 ₄ / RD
P6 ₃ / AS
P6 ₂ / BACK
P6 ₁ / BREQ
P6 ₀ / WAIT
Modes 1 to 4
(expanded modes)
P6₇ (input)/φ (output)
LWR (output)
HWR (output)
RD (output)
AS (output)
P6₂ (input/output)/BACK (output)
P6₁ (input/output)/BREQ (input)
P6₀ (input/output)/WAIT (input)
Figure 7.2 Port 6 Pin Configuration
7.3.2 Register Descriptions
Table 7.4 summarizes the registers of port 6.
Table 7.4 Port 6 Registers
Address*
Name
Abbreviation R/W
H'EE005
Port 6 data direction register P6DDR
W
H'FFFD5
Port 6 data register
P6DR
R/W
Note: * Lower 20 bits of the address in advanced mode.
Initial Value
H'80
H'80
Port 6 Data Direction Register (P6DDR): P6DDR is an 8-bit write-only register that can select
input or output for each pin in port 6.
Rev.4.00 Aug. 20, 2007 Page 148 of 638
REJ09B0395-0400