HD6413008VF25 Datasheet, PDF (200/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

7. I/O Ports
In
the
H8/3008,
following
a
reset
P8₄
functions
as
the
CS
0
output,
while
CS
1
to
CS
3
are
input
ports.
P8DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P8DDR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode
P8DDR retains its previous setting. Therefore, if a transition is made to software standby mode
while port 8 is functioning as an input/output port and a P8DDR bit is set to 1, the corresponding
pin maintains its output state.
Port 8 Data Register (P8DR): P8DR is an 8-bit readable/writable register that stores output data
for port 8. When port 8 functions as an output port, the value of this register is output. When a bit
in P8DDR is set to 1, if port 8 is read the value of the corresponding P8DR bit is returned. When a
bit in P8DDR is cleared to 0, if port 8 is read the corresponding pin logic level is read.
Bits 7 to 5 are reserved. They are fixed at 1, and cannot be modified.
Bit
7
6
5
4
3
2
1
0
⎯
⎯
⎯
P8 ₄
P8 ₃
P8 ₂
P8 ₁
P8 ₀
Initial value
1
1
1
0
0
0
0
0
Read/Write
⎯
⎯
⎯
R/W
R/W
R/W
R/W R/W
Reserved bits
Port 8 data 4 to 0
These bits store data
for port 8 pins
P8DR is initialized to H'E0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev.4.00 Aug. 20, 2007 Page 154 of 638
REJ09B0395-0400