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HD6413008VF25 Datasheet, PDF (130/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents | |||
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5. Interrupt Controller
Bit 6âPriority Level B6 (IPRB6): Selects the priority level of 8-bit timer channel 2, 3 interrupt
requests.
Bit 6
IPRB6
0
1
Description
8-bit timer channel 2 and 3 interrupt requests have priority level 0 (low priority)
(Initial value)
8-bit timer channel 2 and 3 interrupt requests have priority level 1 (high priority)
Bits 5 and 4âReserved: These bits can be written and read, but they do not affect interrupt
priority.
Bit 3âPriority Level B3 (IPRB3): Selects the priority level of SCI channel 0 interrupt requests.
Bit 3
IPRB3
0
1
Description
SCI channel 0 interrupt requests have priority level 0 (low priority)
SCI channel 0 interrupt requests have priority level 1 (high priority)
(Initial value)
Bit 2âPriority Level B2 (IPRB2): Selects the priority level of SCI channel 1 interrupt requests.
Bit 2
IPRB2
0
1
Description
SCI channel 1 interrupt requests have priority level 0 (low priority)
SCI channel 1 interrupt requests have priority level 1 (high priority)
(Initial value)
Bits 1 and 0âReserved: These bits can be written and read, but they do not affect interrupt
priority.
5.2.3 IRQ Status Register (ISR)
ISR is an 8-bit readable/writable register that indicates the status of IRQ5 to IRQ0 interrupt
requests.
Rev.4.00 Aug. 20, 2007 Page 84 of 638
REJ09B0395-0400
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