HD6413008VF25 Datasheet, PDF (150/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

6. Bus Controller
6.1.4 Register Configuration
Table 6.2 summarizes the bus controller's registers.
Table 6.2 Bus Controller Registers
Address*¹ Name
Abbreviation R/W Initial Value
H'EE020
Bus width control register
ABWCR
R/W
H'FF*²
H'EE021
Access state control register
ASTCR
R/W H'FF
H'EE022
Wait control register H
WCRH
R/W H'FF
H'EE023
Wait control register L
WCRL
R/W H'FF
H'EE013
Bus release control register
BRCR
R/W H'FE*³
H'EE01F
Chip select control register
CSCR
R/W H'0F
H'EE01E
Address control register
ADRCR
R/W H'FF
H'EE024
Bus control register
BCR
R/W H'C6
Notes: 1. Lower 20 bits of the address in advanced mode.
2. In modes 2 and 4, the initial value is H'00.
3. In modes 3 and 4, the initial value is H'EE.
6.2 Register Descriptions
6.2.1 Bus Width Control Register (ABWCR)
ABWCR is an 8-bit readable/writable register that selects 8-bit or 16-bit access for each area.
Bit
Modes
1 and 3
Modes
2 and 4
7
ABW7
Initial value 1
Read/Write R/W
Initial value 0
Read/Write R/W
6
ABW6
1
R/W
0
R/W
5
ABW5
1
R/W
0
R/W
4
ABW4
1
R/W
0
R/W
3
ABW3
1
R/W
0
R/W
2
ABW2
1
R/W
0
R/W
1
ABW1
1
R/W
0
R/W
0
ABW0
1
R/W
0
R/W
When ABWCR contains H'FF (selecting 8-bit access for all areas), the chip operates in 8-bit bus
mode: the upper data bus (D₁₅ to D₈) is valid, and port 4 is an input/output port. When at least one
bit is cleared to 0 in ABWCR, the chip operates in 16-bit bus mode with a 16-bit data bus (D₁₅ to
D₀). In modes 1 and 3, ABWCR is initialized to H'FF by a reset and in hardware standby mode. In
modes 2 and 4, ABWCR is initialized to H'00 by a reset and in hardware standby mode. It is not
initialized in software standby mode.
Rev.4.00 Aug. 20, 2007 Page 104 of 638
REJ09B0395-0400