HD6413008VF25 Datasheet, PDF (226/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8. 16-Bit Timer
Block Diagram of Channels 0 and 1: 16-bit timer channels 0 and 1 are functionally identical.
Both have the structure shown in figure 8.2.
TCLKA to TCLKD
φ, φ/2, φ/4, φ/8
Clock selector
Comparator
Control logic
TIOCA₀
TIOCB₀
IMIA0
IMIB0
OVI0
Module data bus
Legend:
16TCNT: Timer counter (16 bits)
GRA, GRB: General registers A and B (input capture/output compare registers) (16 bits ^× 2)
16TCR: Timer control register (8 bits)
TIOR:
Timer I/O control register (8 bits)
Figure 8.2 Block Diagram of Channels 0 and 1
Rev.4.00 Aug. 20, 2007 Page 180 of 638
REJ09B0395-0400