HD6413008VF25 Datasheet, PDF (20/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

2.8.7 Power-Down State ............................................................................................... 51
2.9 Basic Operational Timing ................................................................................................. 51
2.9.1 Overview.............................................................................................................. 51
2.9.2 On-Chip Memory Access Timing........................................................................ 51
2.9.3 On-Chip Supporting Module Access Timing ...................................................... 52
2.9.4 Access to External Address Space ....................................................................... 53
Section 3 MCU Operating Modes .................................................................................. 55
3.1 Overview........................................................................................................................... 55
3.1.1 Operating Mode Selection ................................................................................... 55
3.1.2 Register Configuration......................................................................................... 56
3.2 Mode Control Register (MDCR) ...................................................................................... 56
3.3 System Control Register (SYSCR) ................................................................................... 57
3.4 Operating Mode Descriptions ........................................................................................... 60
3.4.1 Mode 1 ................................................................................................................. 60
3.4.2 Mode 2 ................................................................................................................. 60
3.4.3 Mode 3 ................................................................................................................. 60
3.4.4 Mode 4 ................................................................................................................. 60
3.4.5 Modes 5 to 7 ........................................................................................................ 60
3.5 Pin Functions in Each Operating Mode ............................................................................ 61
3.6 Memory Map in Each Operating Mode ............................................................................ 62
3.6.1 Reserved Areas .................................................................................................... 62
Section 4 Exception Handling ......................................................................................... 65
4.1 Overview........................................................................................................................... 65
4.1.1 Exception Handling Types and Priority............................................................... 65
4.1.2 Exception Handling Operation............................................................................. 65
4.1.3 Exception Vector Table ....................................................................................... 66
4.2 Reset.................................................................................................................................. 68
4.2.1 Overview.............................................................................................................. 68
4.2.2 Reset Sequence .................................................................................................... 68
4.2.3 Interrupts after Reset............................................................................................ 70
4.3 Interrupts........................................................................................................................... 71
4.4 Trap Instruction................................................................................................................. 71
4.5 Stack Status after Exception Handling.............................................................................. 72
4.6 Notes on Stack Usage ....................................................................................................... 73
Section 5 Interrupt Controller .......................................................................................... 75
5.1 Overview........................................................................................................................... 75
5.1.1 Features................................................................................................................ 75
Rev.4.00 Aug. 20, 2007 Page xviii of xliv
REJ09B0395-0400