HD6413008VF25 Datasheet, PDF (143/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

5. Interrupt Controller
5.4.2 Interrupt Exception Handling Sequence
Figure 5.7 shows the interrupt exception handling sequence in mode 2 when the program code and
stack are in an external memory area accessed in two states via a 16-bit bus.
Figure 5.7 Interrupt Exception Handling Sequence
Rev.4.00 Aug. 20, 2007 Page 97 of 638
REJ09B0395-0400