HD6413008VF25 Datasheet, PDF (284/688 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

8. 16-Bit Timer
Note on Waveform Period Setting: When a counter is cleared by compare match, the counter is
cleared in the last state at which the 16TCNT value matches the general register value, at the time
when this value would normally be updated to the next count. The actual counter frequency is
therefore given by the following formula:
f=
φ
(N + 1)
(f: counter frequency. φ: system clock frequency. N: value set in general register.)
Note on Writes in Synchronized Operation: When channels are synchronized, if a 16TCNT
value is modified by byte write access, all 16 bits of all synchronized counters assume the same
value as the counter that was addressed.
(Example) When channels 1 and 2 are synchronized
• Byte write to channel 1 or byte write to channel 2
16TCNT1
W
X
Write A to upper byte
of channel 1
16TCNT1
A
X
16TCNT2
Y
Z
Upper byte Lower byte
16TCNT2
A
X
Write A to lower byte
Upper byte Lower byte
of channel 2
16TCNT1
Y
A
• Word write to channel 1 or word write to channel 2
16TCNT2
Y
A
Upper byte Lower byte
16TCNT1
W
X
16TCNT2
Y
Z
Upper byte Lower byte
Write AB word to
channel 1 or 2
16TCNT1
A
B
16TCNT2
A
B
Upper byte Lower byte
Rev.4.00 Aug. 20, 2007 Page 238 of 638
REJ09B0395-0400