HD64F38024HV Datasheet, PDF (83/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 2 CPU
HD64F38024, HD64F38024R, HD64F38124
(flash memory version)
H'0000
H'0029
H'002A
Interrupt vector area
HD64338024 (mask ROM version)
HD64338024S (mask ROM version)
HD64338124 (mask ROM version)
HD64738024 (PROM version)
H'0000
H'0029
H'002A
Interrupt vector area
On-chip ROM
32 Kbytes
(32768 bytes)
On-chip ROM
32 Kbytes
(32768 bytes)
H'7000
H'7FFF
Firmware
for on-chip emulator^*1
H'7FFF
Not used
H'F020
H'F02B
Internal I/O register
Not used
H'F740
H'F74F
LCD RAM (16 bytes)
Not used
H'F780
H'FB7F
H'FB80
(Workarea for reprogramming
flash memory: 1 Kbyte)^*2
On-chip RAM
(2 Kbytes)
H'FF7F
User area
(1 Kbyte)
H'FF80
Internal I/O register
(128 bytes)
H'FFFF
1024 bytes
H'F740
H'F74F
H'FB80
H'FF7F
H'FF80
H'FFFF
Not used
LCD RAM (16 bytes)
Not used
On-chip RAM
Internal I/O register
(128 bytes)
1024 bytes
Notes: 1. Not available to the user if the on-chip emulator is used.
2. Used by the programming control program when programming flash memory. Also, not available to the user
if the on-chip emulator is used.
Figure 2.16(1) H8/38024, H8/38024S, and H8/38124 Memory Map
Rev. 8.00 Mar. 09, 2010 Page 61 of 658
REJ09B0042-0800