HD64F38024HV Datasheet, PDF (393/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 10 Serial Communication Interface
Figure 10.9 shows an example of the operation when receiving in asynchronous mode.
Serial
data
Start
bit
Receive
data
Parity Stop Start
bit bit bit
Receive
data
Parity Stop Mark state
bit bit (idle state)
1 0 D0 D1
D7 0/1 1 0 D0 D1
D7 0/1 0
1
1 frame
1 frame
RDRF
FER
LSI
operation
User
processing
RXI request RDRF
cleared to 0
RDR data read
0 start bit
detected
ERI request in
response to
framing error
Framing error
processing
Figure 10.9 Example of Operation when Receiving in Asynchronous Mode
(8-Bit Data, Parity, 1 Stop Bit)
10.3.3 Operation in Synchronous Mode
In synchronous mode, SCI3 transmits and receives data in synchronization with clock pulses.
This mode is suitable for high-speed serial communication.
SCI3 has separate transmission and reception units, allowing full-duplex communication with a
shared clock.
As the transmission and reception units are both double-buffered, data can be written during
transmission and read during reception, making possible continuous transmission and reception.
Rev. 8.00 Mar. 09, 2010 Page 371 of 658
REJ09B0042-0800