HD64F38024HV Datasheet, PDF (60/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 2 CPU
2.5 Instruction Set
The H8/300L Series can use a total of 55 instructions, which are grouped by function in table 2.3.
Table 2.3 Instruction Set
Function
Data transfer
Instructions
MOV, PUSH^*1, POP^*1
Number
1
Arithmetic operations ADD, SUB, ADDX, SUBX, INC, DEC, ADDS, SUBS, DAA, 14
DAS, MULXU, DIVXU, CMP, NEG
Logic operations
AND, OR, XOR, NOT
4
Shift
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR 8
Bit manipulation
Branch
BSET, BCLR, BNOT, BTST, BAND, BIAND, BOR, BIOR,
14
BXOR, BIXOR, BLD, BILD, BST, BIST
Bcc^*2, JMP, BSR, JSR, RTS
5
System control
RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP
8
Block data transfer
EEPMOV
1
Total: 55
Notes: 1. PUSH Rn is equivalent to MOV.W Rn, @–SP.
POP Rn is equivalent to MOV.W @SP+, Rn. The same applies to the machine
language.
2. Bcc is a conditional branch instruction in which cc represents a condition code.
The following sections give a concise summary of the instructions in each category, and indicate
the bit patterns of their object code. The notation used is defined next.
Rev. 8.00 Mar. 09, 2010 Page 38 of 658
REJ09B0042-0800