HD64F38024HV Datasheet, PDF (567/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Appendix A CPU Instruction Set
Instruction
MOV
MULXU
NEG
NOP
NOT
OR
ORC
ROTL
ROTR
ROTXL
ROTXR
RTE
RTS
SHAL
SHAR
SHLL
SHLR
SLEEP
STC
SUB
SUBS
POP
PUSH
SUBX
XOR
XORC
Mnemonic
MOV.W Rs, @Rd
MOV.W Rs, @(d:16, Rd)
MOV.W Rs, @–Rd
MOV.W Rs, @aa:16
MULXU.B Rs, Rd
NEG.B Rd
NOP
NOT.B Rd
OR.B #xx:8, Rd
OR.B Rs, Rd
ORC #xx:8, CCR
ROTL.B Rd
ROTR.B Rd
ROTXL.B Rd
ROTXR.B Rd
RTE
RTS
SHAL.B Rd
SHAR.B Rd
SHLL.B Rd
SHLR.B Rd
SLEEP
STC CCR, Rd
SUB.B Rs, Rd
SUB.W Rs, Rd
SUBS.W #1, Rd
SUBS.W #2, Rd
POP Rd
PUSH Rs
SUBX.B #xx:8, Rd
SUBX.B Rs, Rd
XOR.B #xx:8, Rd
XOR.B Rs, Rd
XORC #xx:8, CCR
Instruction Branch
Stack
Fetch
Addr. Read Operation
I
J
K
1
2
1
2
1
1
1
1
1
1
1
1
1
1
1
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Byte Data
Access
L
Word Data Internal
Access
Operation
M
N
1
1
1
2
1
12
2
2
2
2
Rev. 8.00 Mar. 09, 2010 Page 545 of 658
REJ09B0042-0800