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HD64F38024HV Datasheet, PDF (111/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series
Wakeup Interrupt Request Register (IWPR)
Section 3 Exception Handling
Bit
Initial value
Read/Write
7
IWPF7
0
R/(W)*
6
IWPF6
0
R/(W)*
5
IWPF5
0
R/(W)*
4
IWPF4
0
R/(W)*
3
IWPF3
0
R/(W)*
2
IWPF2
0
R/(W)*
1
IWPF1
0
R/(W)*
0
IWPF0
0
R/(W)*
Note: * Only a write of 0 for flag clearing is possible
IWPR is an 8-bit read/write register containing wakeup interrupt request flags. When one of pins
WKP7 to WKP0 is designated for wakeup input and a rising or falling edge is input at that pin, the
corresponding flag in IWPR is set to 1. A flag is not cleared automatically when the
corresponding interrupt is accepted. Flags must be cleared by writing 0.
Bits 7 to 0—Wakeup Interrupt Request Flags (IWPF7 to IWPF0)
Bit n
IWPFn
0
1
Description
Clearing condition:
When IWPFn= 1, it is cleared by writing 0
(initial value)
Setting condition:
When pin WKPn is designated for wakeup input and a rising or falling edge is input at
that pin
(n = 7 to 0)
Rev. 8.00 Mar. 09, 2010 Page 89 of 658
REJ09B0042-0800