HD64F38024HV Datasheet, PDF (460/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 14 Power-On Reset and Low-Voltage Detection Circuits (H8/38124 Group Only)
14.2.3 Low-Voltage Detection Counter (LVDCNT)
Bit
Initial value
Read/Write
7
CNT7
0
R
6
CNT6
0
R
5
CNT5
0
R
4
CNT4
0
R
3
CNT3
0
R
2
CNT2
0
R
1
CNT1
0
R
0
CNT0
0
R
LVDCNT is a read-only 8-bit up-counter. Counting begins when 1 is written to LVDE. The
counter increments using φ/4 as the clock source until it overflows by switching from H'FF to
H'00, at which time the OVF bit in the LVDSR register is set to 1, indicating that the on-chip
reference voltage generator has stabilized. If the LVD function is used, it is necessary to stand by
until the counter has overflowed. The initial value of LVDCNT is H'00.
14.2.4 Clock Stop Register 2 (CKSTPR2)
Bit
7
6
LVDCKSTP
—
Initial value
1
1
Read/Write R/W
—
5
4
3
2
1
0
—
PW2CKSTP AECKSTP WDCKSTP PW1CKSTP LDCKSTP
1
1
1
1
1
1
—
R/W
R/W
R/W
R/W
R/W
CKSTPR2 is an 8-bit read/write register. It is used to control the module’s module standby mode.
Only the bits relevant to the LVD function are described in this section. Refer to the sections on
the other modules for information about the other bits.
Bit 7—LVD Module Standby Control (LVDCKSTP)
This bit is used to control setting of the LVD function to module standby status and cancellation of
that status.
Bit 7
LVDCKSTP
Description
0
Sets LVD to module standby status
1
Cancels LVD module standby status
(initial value)
Note: This bit is implemented on the H8/38124 Group only. On other products it is always read as
1 and cannot be written to.
Rev. 8.00 Mar. 09, 2010 Page 438 of 658
REJ09B0042-0800