HD64F38024HV Datasheet, PDF (586/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Appendix B Internal I/O Registers
SMR—Serial Mode Register
Bit
Initial value
Read/Write
7
6
5
COM CHR
PE
0
0
0
R/W
R/W
R/W
H'A8
SCI3
4
3
2
1
0
PM STOP MP CKS1 CKS0
0
0
0
0
0
R/W R/W R/W R/W R/W
Clock Select
0 0 φ clock
0 1 φ_w/2 clock
1 0 φ/16 clock
1 1 φ/64 clock
5 Bit Communication
0 5 bits communication disabled
1 5 bits communication enabled
Stop Bit Length
0 1 stop bit
1 2 stop bits
Parity Mode
0 Even parity
1 Odd parity
Parity Enable
0 Parity bit addition and checking disabled
1 Parity bit addition and checking enabled
Character Length
0 8-bit data/5-bit data
1 7-bit data/5-bit data
Communication Mode
0 Asynchronous mode
1 Synchronous mode
Rev. 8.00 Mar. 09, 2010 Page 564 of 658
REJ09B0042-0800