|
HD64F38024HV Datasheet, PDF (74/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series | |||
|
◁ |
Section 2 CPU
2.5.7 System Control Instructions
Table 2.10 describes the system control instructions. Figure 2.9 shows their object code formats.
Table 2.10 System Control Instructions
Instruction
Size*
Function
RTE
â
Returns from an exception-handling routine
SLEEP
â
Causes a transition from active mode to a power-down mode. See
section 5, Power-Down Modes, for details.
LDC
B
Rs â CCR, #IMM â CCR
Moves immediate data or general register contents to the condition
code register
STC
B
CCR â Rd
Copies the condition code register to a specified general register
ANDC
B
CCR ⧠#IMM â CCR
Logically ANDs the condition code register with immediate data
ORC
B
CCR ⨠#IMM â CCR
Logically ORs the condition code register with immediate data
XORC
B
CCR â #IMM â CCR
Logically exclusive-ORs the condition code register with immediate
data
NOP
â
PC + 2 â PC
Only increments the program counter
Note: * Size: Operand size
B: Byte
Rev. 8.00 Mar. 09, 2010 Page 52 of 658
REJ09B0042-0800
|
▷ |