HD64F38024HV Datasheet, PDF (110/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 3 Exception Handling
Bit 2—Timer FL Interrupt Request Flag (IRRTFL)
Bit 2
IRRTFL
0
1
Description
Clearing condition:
When IRRTFL = 1, it is cleared by writing 0
Setting condition:
When TCFL and OCRFL match in 8-bit timer mode
(initial value)
Bit 1—Timer C Interrupt Request Flag (IRRTC)
Bit 1
IRRTC
0
1
Description
Clearing condition:
When IRRTC = 1, it is cleared by writing 0
Setting condition:
When the timer C counter value overflows or underflows
(initial value)
Bit 0—Asynchronous Event Counter Interrupt Request Flag (IRREC)
Bit 0
IRREC
0
1
Description
Clearing condition:
When IRREC = 1, it is cleared by writing 0
(initial value)
Setting condition:
When ECH overflows in 16-bit counter mode, or ECH or ECL overflows in 8-bit
counter mode
Rev. 8.00 Mar. 09, 2010 Page 88 of 658
REJ09B0042-0800