HD64F38024HV Datasheet, PDF (179/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

6.5.2 Block Diagram
Section 6 ROM
Internal address bus
Internal data bus (16 bits)
FLMCR1
FLMCR2
EBR
FLPWCR
FENR
Bus interface/controller
Operating
mode
TES pin
P95 pin
P34 pin
Flash memory
[Legend]
FLMCR1: Flash memory control register 1
FLMCR2: Flash memory control register 2
EBR:
Erase block register
FLPWCR: Flash memory power control register
FENR: Flash memory enable register
Figure 6.7 Block Diagram of Flash Memory
Rev. 8.00 Mar. 09, 2010 Page 157 of 658
REJ09B0042-0800