HD64F38024HV Datasheet, PDF (605/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

AMR—A/D Mode Register
Bit
Initial value
Read/Write
7
6
5
CKS TRGE ⎯
0
0
1
R/W
R/W
⎯
Appendix B Internal I/O Registers
H'C6
A/D Converter
4
3
2
1
0
⎯
CH3 CH2 CH1 CH0
1
0
0
0
0
⎯
R/W
R/W
R/W
R/W
Channel Select
Bit 3 Bit 2 Bit 1 Bit 0
CH3 CH2 CH1 CH0 Analog Input Channel
0
0
*
* ^{No channel selected}
1
0
0 AN ₀
1 AN ₁
1
0 AN ₂
1 AN ₃
1
0
0
0 AN ₄
1 AN ₅
1
0 AN ₆
1 AN ₇
1
1
*
* Do not specify this
combination
External Trigger Select
*: Don't care
0 Disables start of A/D conversion by external trigger
1 Enables start of A/D conversion by rising or falling edge
of external trigger at pin ADTRG
Clock Select
Bit 7
CKS Conversion Period
0 62/φ
1 31/φ
Conversion Time
φ = 1 MHz φ = 5 MHz φ = 10 MHz^*2
62 μs
31 μs
12.4 μs
⎯^*1
6.2 μs
⎯^*1
Notes: 1. Except for the H8/38124 Group, operation cannot be
guaranteed if the conversion time is less than 12.4 µs.
Make sure to select a setting that gives a conversion time of
12.4 µs or more in such cases. For the H8/38124 Group select
a setting that gives a conversion time of 6.2 µs or more.
2. H8/38124 Group only.
Rev. 8.00 Mar. 09, 2010 Page 583 of 658
REJ09B0042-0800