HD64F38024HV Datasheet, PDF (576/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Appendix B Internal I/O Registers
EBR—Erase Block Register
Bit
7
6
5
⎯
⎯
⎯
Initial value
0
0
0
Read/Write
⎯
⎯
⎯
H'F023
Flash Memory
4
3
2
1
0
EB4
EB3 EB2
EB1
EB0
0
0
0
0
0
R/W R/W R/W R/W R/W
Blocks 4 to 0
0 When a block of EB4 to EB0 is not selected (initial value)
1 When a block of EB4 to EB0 is selected
Note: Set the bit of EBR to H'00 when erasing.
FENR—Flash Memory Enable Register
H'F02B
Flash Memory
Bit
7
6
5
4
3
2
1
0
FLSHE ⎯
⎯
⎯
⎯
⎯
⎯
⎯
Initial value
0
0
0
0
0
0
0
0
Read/Write
R/W
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Flash Memory Control Register Enable
0 The flash memory control register cannot be accessed
1 The flash memory control register can be accessed
Rev. 8.00 Mar. 09, 2010 Page 554 of 658
REJ09B0042-0800