HD64F38024HV Datasheet, PDF (678/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Item
B.2 Functions
Page
566
Revision (See Manual for Details)
Figure amended
SCR3—Serial Control Register 3
Bit
Initial value
Read/Write
7
6
5
4
TIE
RIE
TE
RE
0
0
0
0
R/W
R/W R/W
R/W
H'AA
3
2
⎯
TEIE
0
0
R/W R/W
SCI3
1
CKE1
0
R/W
0
CKE0
0
R/W
Clock Enable
Bit 1 Bit 0
CKE1 CKE0
0
0
0
1
1
0
1
1
Communication Mode
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
Description
Clock Source
Internal clock
SCK32 Pin Function
I/O port
Internal clock
Serial clock output
Internal clock
Clock output
Reserved (Do not specify this combination)
External clock
Clock input
External clock
Serial clock input
Reserved (Do not specify this combination)
Reserved (Do not specify this combination)
Transmit End Interrupt Enable
0 Transmit end interrupt request (TEI) disabled
1 Transmit end interrupt request (TEI) enabled
568
Figure amended
SSR—Serial Status Register
H'AC
Bit
Initial value
Read/Write
7
TDRE
1
R/(W)^*
6
RDRF
0
R/(W)^*
5
OER
0
R/(W)^*
4
FER
0
R/(W)^*
3
PER
0
R/(W)^*
2
TEND
1
R
SCI3
1
0
⎯
⎯
0
0
R
R/W
Appendix F Package 639
Dimensions
Figure F.1 FP-80A
Package Dimensions
Figure F.2 FP-80B 640
Package Dimensions
Figure F.3 TFP-80C 641
Package Dimensions
Figure replaced
Figure replaced
Figure replaced
Rev. 8.00 Mar. 09, 2010 Page 656 of 658
REJ09B0042-0800