HD64F38024HV Datasheet, PDF (326/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 9 Timers
Watchdog
on-chip
oscillator
φ
PSS
TMW
TCSRW
TCW
φ_W/32
Interrupt/reset
controller
Internal reset signal or
interrupt request signal
[Legend]
TCSRW: Timer control/status register W
TCW: Timer counter W
TMW: Timer mode register W
PSS: Prescaler S
Figure 9.17(2) Block Diagram of Watchdog Timer
(H8/38124 Group)
Register Configuration
Table 9.16 shows the register configuration of the watchdog timer.
Table 9.16 Watchdog Timer Registers
Name
Abbr.
R/W
Initial Value
Timer control/status register W TCSRW
R/W
H'AA
Timer counter W
Timer mode register W^*
TCW
R/W
TMW
R/W
H'00
H'FF
Clock stop register 2
CKSTPR2 R/W
H'FF
Port mode register 2
PMR2
R/W
H'D8
Note: * This register is implemented on the H8/38124 Group only.
Address
H'FFB2
H'FFB3
H'FFF8
H'FFFB
H'FFC9
Rev. 8.00 Mar. 09, 2010 Page 304 of 658
REJ09B0042-0800