HD64F38024HV Datasheet, PDF (62/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 2 CPU
2.5.1 Data Transfer Instructions
Table 2.4 describes the data transfer instructions. Figure 2.5 shows their object code formats.
Table 2.4 Data Transfer Instructions
Instruction
Size^*
Function
MOV
B/W
(EAs) → Rd, Rs → (EAd)
Moves data between two general registers or between a general
register and memory, or moves immediate data to a general
register.
The Rn, @Rn, @(d:16, Rn), @aa:16, #xx:16, @–Rn, and @Rn+
addressing modes are available for word data. The @aa:8
addressing mode is available for byte data only.
The @–R7 and @R7+ modes require word operands. Do not
specify byte size for these two modes.
POP
W
@SP+ → Rn
Pops a 16-bit general register from the stack. Equivalent to
MOV.W @SP+, Rn.
PUSH
W
Rn → @–SP
Pushes a 16-bit general register onto the stack. Equivalent to
MOV.W Rn, @–SP.
Note: * Size: Operand size
B: Byte
W: Word
Certain precautions are required in data access. See section 2.9.1, Notes on Data Access, for
details.
Figure 2.7 lists the format of the bit manipulation instructions.
Rev. 8.00 Mar. 09, 2010 Page 40 of 658
REJ09B0042-0800