HD64F38024HV Datasheet, PDF (538/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 16 Electrical Characteristics
Item
Applicable
Values
Symbol Pins
Min Typ Max
Unit Test Condition
Reference
Figure
Input pin high
tIH
width
IRQ0, IRQ1, 2
—
IRQ3, IRQ4,
IRQAEC,
WKP0 to
WKP7, TMIC,
TMIF, TMIG,
ADTRG
—
tcyc
tsubcyc
Figure 16.4
Input pin low
tIL
width
AEVL, AEVH 0.5 —
IRQ0, IRQ1, 2
—
IRQ3, IRQ4,
IRQAEC,
WKP0 to
WKP7, TMIC,
TMIF, TMIG,
ADTRG
—
tOSC
—
tcyc
tsubcyc
Figure 16.4
AEVL, AEVH 0.5 —
—
tOSC
UD pin minimum tUDH
UD
transition width
tUDL
4
—
—
tcyc
tsubcyc
Figure 16.7
Notes: 1. Determined by the SA1 and SA0 bits in the system control register 2 (SYSCR2).
2. These characteristics are given as ranges between minimum and maximum values in
order to account for factors such as temperature, power supply voltage, and variation
among production lots. When designing systems, make sure to give due consideration
to the SPEC range. Please contact a Renesas sales or support representative for
actual performance data on the product.
Table 16.24 Serial Interface (SCI3) Timing
V_CC = 2.7 V to 5.5 V, AV_CC = 2.7 V to 5.5 V, V_SS = AV_SS = 0.0 V, unless otherwise specified
Item
Symbol
Input clock Asynchronous
tscyc
cycle
Clocked synchronous
Input clock pulse width
Transmit data delay time
(clocked synchronous)
tSCKW
tTXD
Receive data setup time
tRXS
(clocked synchronous)
Receive data hold time
tRXH
(clocked synchronous)
Values
Min Typ Max Unit
4
— — tcyc or
6
—
—
tsubcyc
0.4 —
——
150.0 —
0.6 tscyc
1
tcyc or
tsubcyc
— ns
150.0 — — ns
Test
Condition
Reference
Figure
Figure 16.5
Figure 16.5
Figure 16.6
Figure 16.6
Figure 16.6
Rev. 8.00 Mar. 09, 2010 Page 516 of 658
REJ09B0042-0800