HD64F38024HV Datasheet, PDF (342/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 9 Timers
Bits 5 and 4—AEC Clock Select L (ACKL1, ACKL0)
Bits 5 and 4 select the clock used by ECL.
Bit 5
ACKL1
0
1
Bit 4
ACKL0
0
1
0
1
Description
AEVL pin input
φ/2
φ/4
φ/8
(initial value)
Bits 3 to 1—Event Counter PWM Clock Select (PWCK2, PWCK1, PWCK0)
Bits 3 to 1 select the event counter PWM clock.
Bit 3
PWCK2
0
1
Bit 2
PWCK1
0
1
*
Bit 1
PWCK0
0
1
0
1
0
1
Description
φ/2
φ/4
φ/8
φ/16
φ/32
φ/64
(initial value)
*: Don’t care
Bit 0—Reserved
Bit 0 is a readable/writable reserved bit. It is initialized to 0 by a reset.
Note: Do not set this bit to 1.
Rev. 8.00 Mar. 09, 2010 Page 320 of 658
REJ09B0042-0800