HD64F38024HV Datasheet, PDF (311/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 9 Timers
Bits 1 and 0—Clock Select (CKS1, CKS0)
Bits 1 and 0 select the clock input to TCG from among four internal clock sources.
Bit 1
CKS1
0
0
1
1
Bit 0
CKS0
0
1
0
1
Description
Internal clock: counting on φ/64
Internal clock: counting on φ/32
Internal clock: counting on φ/2
Internal clock: counting on φw/4
(initial value)
Clock Stop Register 1 (CKSTPR1)
Bit:
7
⎯
Initial value: 1
Read/Write: ⎯
6
5
4
3
2
1
0
⎯ S32CKSTP ADCKSTP TGCKSTP TFCKSTP TCCKSTP TACKSTP
1
1
1
1
1
1
1
⎯
R/W
R/W
R/W
R/W
R/W
R/W
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to timer G is described here. For details of the other bits, see the
sections on the relevant modules.
Bit 3—Timer G Module Standby Mode Control (TGCKSTP)
Bit 3 controls setting and clearing of module standby mode for timer G.
TGCKSTP
0
1
Description
Timer G is set to module standby mode
Timer G module standby mode is cleared
(initial value)
Rev. 8.00 Mar. 09, 2010 Page 289 of 658
REJ09B0042-0800