HD64F38024HV Datasheet, PDF (319/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 9 Timers
9.5.5 Application Notes
Internal Clock Switching and TCG Operation
Depending on the timing, TCG may be incremented by a switch between different internal clock
sources. Table 9.13 shows the relation between internal clock switchover timing (by write to bits
CKS1 and CKS0) and TCG operation.
When TCG is internally clocked, an increment pulse is generated on detection of the falling edge
of an internal clock signal, which is divided from the system clock (φ) or subclock (φw). For this
reason, in a case like No. 3 in table 9.13 where the switch is from a high clock signal to a low
clock signal, the switchover is seen as a falling edge, causing TCG to increment.
Table 9.13 Internal Clock Switching and TCG Operation
Clock Levels Before and After
No. Modifying Bits CKS1 and CKS0
1
Goes from low level to low level
TCG Operation
Clock before
switching
Clock after
switching
Count
clock
TCG
N
N+1
2
Goes from low level to high level
Clock before
switching
Clock after
switching
Count
clock
Write to CKS1 and CKS0
TCG
N
N+1
N+2
Write to CKS1 and CKS0
Rev. 8.00 Mar. 09, 2010 Page 297 of 658
REJ09B0042-0800