HD64F38024HV Datasheet, PDF (65/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 2 CPU
2.5.3 Logic Operations
Table 2.6 describes the four instructions that perform logic operations.
Table 2.6 Logic Operation Instructions
Instruction
Size^*
Function
AND
B
Rd ∧ Rs → Rd, Rd ∧ #IMM → Rd
Performs a logical AND operation on a general register and
another general register or immediate data
OR
B
Rd ∨ Rs → Rd, Rd ∨ #IMM → Rd
Performs a logical OR operation on a general register and another
general register or immediate data
XOR
B
Rd ⊕ Rs → Rd, Rd ⊕ #IMM → Rd
Performs a logical exclusive OR operation on a general register
and another general register or immediate data
NOT
B
~ Rd → Rd
Obtains the one’s complement (logical complement) of general
register contents
Note: * Size: Operand size
B: Byte
Rev. 8.00 Mar. 09, 2010 Page 43 of 658
REJ09B0042-0800