HD64F38024HV Datasheet, PDF (377/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 10 Serial Communication Interface
Table 10.7 Relation between n and Clock
SMR Setting
n
Clock
CKS1
CKS0
0
φ
0
0
0
φw/2^*1/φw^*2
0
1
2
φ/16
1
0
3
φ/64
1
1
Notes: 1. φw/2 clock in active (medium-speed/high-speed) mode and sleep mode
2. φw clock in subactive mode and subsleep mode
In subactive or subsleep mode, SCI3 can be operated when CPU clock is φw/2 only.
Rev. 8.00 Mar. 09, 2010 Page 355 of 658
REJ09B0042-0800