HD64F38024HV Datasheet, PDF (557/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Appendix A CPU Instruction Set
Addressing Mode/
Instruction Length (bytes)
Mnemonic
Operation
ROTL.B Rd
B
2
C
b₇
b₀
ROTR.B Rd
B
2
C
b₇
b₀
BSET #xx:3, Rd
BSET #xx:3, @Rd
B (#xx:3 of Rd8) ← 1
B (#xx:3 of @Rd16) ← 1
2
4
BSET #xx:3, @aa:8
BSET Rn, Rd
BSET Rn, @Rd
B (#xx:3 of @aa:8) ← 1
B (Rn8 of Rd8) ← 1
B (Rn8 of @Rd16) ← 1
4
2
4
BSET Rn, @aa:8
B (Rn8 of @aa:8) ← 1
4
BCLR #xx:3, Rd
B (#xx:3 of Rd8) ← 0
2
BCLR #xx:3, @Rd
B (#xx:3 of @Rd16) ← 0
4
BCLR #xx:3, @aa:8
BCLR Rn, Rd
BCLR Rn, @Rd
B (#xx:3 of @aa:8) ← 0
B (Rn8 of Rd8) ← 0
B (Rn8 of @Rd16) ← 0
4
2
4
BCLR Rn, @aa:8
BNOT #xx:3, Rd
BNOT #xx:3, @Rd
BNOT #xx:3, @aa:8
BNOT Rn, Rd
BNOT Rn, @Rd
BNOT Rn, @aa:8
B (Rn8 of @aa:8) ← 0
B (#xx:3 of Rd8) ←
(#xx:3 of Rd8)
B (#xx:3 of @Rd16) ←
(#xx:3 of @Rd16)
B (#xx:3 of @aa:8) ←
(#xx:3 of @aa:8)
B (Rn8 of Rd8) ←
(Rn8 of Rd8)
B (Rn8 of @Rd16) ←
(Rn8 of @Rd16)
B (Rn8 of @aa:8) ←
(Rn8 of @aa:8)
4
2
4
4
2
4
4
Condition Code
I HNZVC
⎯⎯
02
⎯⎯
02
⎯⎯⎯⎯⎯⎯ 2
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 2
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 2
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 2
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 2
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 2
⎯⎯⎯⎯⎯⎯ 8
⎯⎯⎯⎯⎯⎯ 8
Rev. 8.00 Mar. 09, 2010 Page 535 of 658
REJ09B0042-0800