HD64F38024HV Datasheet, PDF (71/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 2 CPU
BIAND, BIOR, BIXOR, BILD, BIST
15
87
0
op
IMM
rn
Operand: register direct (Rn)
Bit No.: immediate (#xx:3)
15
87
0
op
rn
0 0 0 0 Operand: register indirect (@Rn)
op
IMM
0 0 0 0 _{Bit No.: immediate (#xx:3)}
15
op
87
0
abs
Operand: absolute (@aa:8)
op
IMM
0 0 0 0 _{Bit No.: immediate (#xx:3)}
[Legend]
op: Operation field
rm, rn: Register field
abs: Absolute address
IMM: Immediate data
Figure 2.7 Bit Manipulation Instruction Codes (cont)
Rev. 8.00 Mar. 09, 2010 Page 49 of 658
REJ09B0042-0800