HD64F38024HV Datasheet, PDF (411/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 11 10-Bit PWM
Bits 7 to 2—Reserved/Bits 7 to 3—Reserved*
Bits 7 to 2 are reserved; they are always read as 1, and cannot be modified.
Note: * Implemented on H8/38124 Group only.
Bit 2—Output Format Select (PWCRm2)*
This bit selects the format of the output from the PWMm output pin.
This bit is write-only. Reading it always returns 1.
Bit 2
PWCRm2
0
1
Description
Pulse-division PWM
Event counter PWM
(initial value)
Note: * Implemented on H8/38124 Group only.
Bits 1 and 0—Clock Select 1 and 0 (PWCRm1, PWCRm0)
Bits 1 and 0 select the clock supplied to the 10-bit PWM. These bits are write-only bits; they are
always read as 1.
Bit 1
Bit 0
PWCRm1 PWCRm0 Description
0
0
The input clock is φ (tφ^* = 1/φ)
The conversion period is 512/φ, with a minimum modulation
width of 1/2φ
0
1
The input clock is φ/2 (tφ^* = 2/φ)
The conversion period is 1,024/φ, with a minimum
modulation width of 1/φ
1
0
The input clock is φ/4 (tφ^* = 4/φ)
The conversion period is 2,048/φ, with a minimum
modulation width of 2/φ
1
1
The input clock is φ/8 (tφ^* = 8/φ)
The conversion period is 4,096/φ, with a minimum
modulation width of 4/φ
Note: * Period of PWM input clock.
(initial value)
Rev. 8.00 Mar. 09, 2010 Page 389 of 658
REJ09B0042-0800