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HD64F38024HV Datasheet, PDF (31/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series
1.3 Pin Arrangement and Functions
Section 1 Overview
1.3.1 Pin Arrangement
The H8/38024 Group, H8/38024R Group, H8/38024S Group, and H8/38124 Group pin
arrangements are shown in figures 1.2, 1.3, and 1.4. The bonding pad location diagram of the
HCD64338024, HCD64338023, HCD64338022, HCD64338021, and HCD64338020 is shown in
figure 1.5. The bonding pad coordinates of the HCD64338024, HCD64338023, HCD64338022,
HCD64338021, and HCD64338020 are given in table 1.2. The bonding pad location diagram of
the HCD64F38024, HCD64F38024R is shown in figure 1.6. The bonding pad coordinates of the
HCD64F38024 are given in table 1.3. The bonding pad location diagram of the HCD64338024S,
HCD64338023S, HCD64338022S, HCD64338021S, and HCD64338020S is shown in figure 1.7.
The bonding pad coordinates of the HCD64338024S, HCD64338023S, HCD64338022S,
HCD64338021S, and HCD64338020S are given in table 1.4.
P30/UD 61
P31/TMOFL 62
P32/TMOFH 63
P33 64
P34 65
P35 66
P36/AEVH 67
P37/AEVL 68
P40/SCK32 69
P41/RXD32 70
P42/TXD32 71
P43/IRQ0 72
PB0/AN0 73
PB1/AN1 74
PB2/AN2 75
PB3/AN3/IRQ1/TMIC 76
PB4/AN4 77
PB5/AN5 78
PB6/AN6 79
PB7/AN7 80
FP-80A, TFP-80C
(Top view)
40 P83/SEG28
39 P82/SEG27
38 P81/SEG26
37 P80/SEG25
36 P77/SEG24
35 P76/SEG23
34 P75/SEG22
33 P74/SEG21
32 P73/SEG20
31 P72/SEG19
30 P71/SEG18
29 P70/SEG17
28 P67/SEG16
27 P66/SEG15
26 P65/SEG14
25 P64/SEG13
24 P63/SEG12
23 P62/SEG11
22 P61/SEG10
21 P60/SEG9
Note: If the on-chip emulator is used, pins 95, 33, 34, and 35 are reserved for the emulator and not available to the user.
Figure 1.2(1) Pin Arrangement (FP-80A, TFP-80C: Top View,
H8/38024 Group, H8/38024R Group, H8/38024S Group)
Rev. 8.00 Mar. 09, 2010 Page 9 of 658
REJ09B0042-0800