HD64F38024HV Datasheet, PDF (146/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 5 Power-Down Modes
11. On the H8/38124 Group, operates only when the on-chip oscillator is selected; otherwise stops and stands by. On
the H8/38024, H8/38024S, and H8/38024R Group, stops and stands by.
5.1.1 System Control Registers
The operation mode is selected using the system control registers described in table 5.3.
Table 5.3 System Control Registers
Name
System control register 1
System control register 2
Abbreviation
SYSCR1
SYSCR2
R/W
R/W
R/W
Initial Value
H'07
H'F0
Address
H'FFF0
H'FFF1
System Control Register 1 (SYSCR1)
Bit
7
6
5
4
3
2
SSBY STS2 STS1 STS0 LSON
⎯
Initial value
0
0
0
0
0
1
Read/Write
R/W
R/W
R/W
R/W
R/W
⎯
1
MA1
1
R/W
0
MA0
1
R/W
SYSCR1 is an 8-bit read/write register for control of the power-down modes.
Upon reset, SYSCR1 is initialized to H'07.
Bit 7—Software Standby (SSBY)
This bit designates transition to standby mode or watch mode.
Bit 7
SSBY
0
1
Description
• When a SLEEP instruction is executed in active mode,
a transition is made to sleep mode
(initial value)
• When a SLEEP instruction is executed in subactive mode, a transition is made to
subsleep mode
• When a SLEEP instruction is executed in active mode, a transition is made to
standby mode or watch mode
• When a SLEEP instruction is executed in subactive mode, a transition is made to
watch mode
Rev. 8.00 Mar. 09, 2010 Page 124 of 658
REJ09B0042-0800