HD64F38024HV Datasheet, PDF (72/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 2 CPU
2.5.6 Branching Instructions
Table 2.9 describes the branching instructions. Figure 2.8 shows their object code formats.
Table 2.9 Branching Instructions
Instruction
Bcc
Size
—
Function
Branches to the designated address if condition cc is true. The
branching conditions are given below.
Mnemonic
BRA (BT)
BRN (BF)
BHI
BLS
BCC (BHS)
BCS (BLO)
BNE
BEQ
BVC
BVS
BPL
BMI
BGE
BLT
BGT
BLE
Description
Always (true)
Never (false)
High
Low or same
Carry clear (high or same)
Carry set (low)
Not equal
Equal
Overflow clear
Overflow set
Plus
Minus
Greater or equal
Less than
Greater than
Less or equal
Condition
Always
Never
C∨Z=0
C∨Z=1
C=0
C=1
Z=0
Z=1
V=0
V=1
N=0
N=1
N⊕V=0
N⊕V=1
Z ∨ (N ⊕ V) = 0
Z ∨ (N ⊕ V) = 1
JMP
BSR
JSR
RTS
—
Branches unconditionally to a specified address
—
Branches to a subroutine at a specified address
—
Branches to a subroutine at a specified address
—
Returns from a subroutine
Rev. 8.00 Mar. 09, 2010 Page 50 of 658
REJ09B0042-0800