HD64F38024HV Datasheet, PDF (271/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Block Diagram
Figure 9.1 shows a block diagram of timer A.
Section 9 Timers
φ_W
1/4
PSW
φ_W /4
TMA
φ_W/128
φ/8192, φ/4096, φ/2048,
φ/512, φ/256, φ/128,
φ/32, φ/8
TCA
φ
PSS
IRRTA
[Legend]
TMA:
TCA:
IRRTA:
PSW:
PSS:
Timer mode register A
Timer counter A
Timer A overflow interrupt request flag
Prescaler W
Prescaler S
Note: * Can be selected only when the prescaler W output (φ_W /128) is used as the TCA input clock.
Figure 9.1 Block Diagram of Timer A
Rev. 8.00 Mar. 09, 2010 Page 249 of 658
REJ09B0042-0800