HD64F38024HV Datasheet, PDF(197/684 Page) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

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HD64F38024HV Datasheet, PDF (197/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

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Section 6 ROM

Increment address

Erase start

SWE bit â 1

Wait 1 Î¼s

nâ1

Set EBR

Enable WDT

ESU bit â 1

Wait 100 Î¼s

E bit â 1

Wait 10 ms

E bit â 0

Wait 10 Î¼s

ESU bit â 0

Wait 10 Î¼s

Disable WDT

EV bit â 1

Wait 20 Î¼s

Set block start address as verify address

H'FF dummy write to verify address

Wait 2 Î¼s

Read verify data

No

Verify data = all 1s ?

Yes

No

Last address of block ?

Yes

EV bit â 0

Wait 4 Î¼s

nân+1

EV bit â 0

Wait 4Î¼s

No

All erase block erased ?

Yes

SWE bit â 0

Wait 100 Î¼s

Yes

n â¤100 ?

No

SWE bit â 0

Wait 100 Î¼s

End of erasing

Erase failure

Figure 6.11 Erase/Erase-Verify Flowchart

Rev. 8.00 Mar. 09, 2010 Page 175 of 658

REJ09B0042-0800

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