HD64F38024HV Datasheet, PDF (625/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

IENR1—Interrupt Enable Register 1
Appendix B Internal I/O Registers
H'F3
System Control
Bit
Initial value
Read/Write
7
IENTA
0
R/W
6
5
4
3
2
1
0
⎯ IENWP IEN4 IEN3 IENEC2 IEN1 IEN0
⎯
0
0
0
0
0
0
W
R/W R/W R/W R/W R/W R/W
IRQ₁ to IRQ₀ Interrupt Enable
0 Disables IRQ₁ to IRQ₀ interrupt, requests
1 Enables IRQ₁ to IRQ₀ interrupt requests
IRQAEC Interrupt Enable
0 Disables IRQAEC interrupt requests
1 Enables IRQAEC interrupt requests
IRQ₄ and IRQ₃ Interrupt Enable
0 Disables IRQ₄ and IRQ₃ interrupt requests
1 Enables IRQ₄ and IRQ₃ interrupt requests
Wakeup Interrupt Enable
0 Disables WKP₇ to WKP₀ interrupt requests
1 Enables WKP₇ to WKP₀ interrupt requests
Timer A Interrupt Enable
0 Disables timer A interrupt requests
1 Enables timer A interrupt requests
Rev. 8.00 Mar. 09, 2010 Page 603 of 658
REJ09B0042-0800