HD64F38024HV Datasheet, PDF (588/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Appendix B Internal I/O Registers
SCR3—Serial Control Register 3
H'AA
SCI3
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
TIE
RIE
TE
RE
⎯
TEIE CKE1 CKE0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W R/W
R/W
R/W
Clock Enable
Bit 1 Bit 0
CKE1 CKE0
0
0
0
1
1
0
1
1
Communication Mode
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
Description
Clock Source
Internal clock
SCK₃₂ Pin Function
I/O port
Internal clock
Serial clock output
Internal clock
Clock output
Reserved (Do not specify this combination)
External clock
Clock input
External clock
Serial clock input
Reserved (Do not specify this combination)
Reserved (Do not specify this combination)
Transmit End Interrupt Enable
0 Transmit end interrupt request (TEI) disabled
1 Transmit end interrupt request (TEI) enabled
Receive Enable
0 Receive operation disabled (RXD₃₂ pin is I/O port)
1 Receive operation enabled (RXD₃₂ pin is receive data pin)
Transmit Enable
0 Transmit operation disabled (TXD₃₂ pin is I/O port)
1 Transmit operation enabled (TXD₃₂ pin is transmit data pin)
Receive Interrupt Enable
0 Receive data full interrupt request (RXI) and receive error interrupt request (ERI) disabled
1 Receive data full interrupt request (RXI) and receive error interrupt request (ERI) enabled
Transmit Interrupt Enable
0 Transmit data empty interrupt request (TXI) disabled
1 Transmit data empty interrupt request (TXI) enabled
Rev. 8.00 Mar. 09, 2010 Page 566 of 658
REJ09B0042-0800