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HD64F38024HV Datasheet, PDF (537/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series
Section 16 Electrical Characteristics
16.8.3 AC Characteristics
Table 16.23 lists the control signal timing and table 16.24 lists the serial interface timing.
Table 16.23 Control Signal Timing
VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VSS = AVSS = 0.0 V, unless otherwise specified
Item
System clock
oscillation
frequency
OSC clock (φOSC)
cycle time
Applicable
Symbol Pins
Min
fOSC
OSC1, OSC2 2.0
0.7
Values
Typ
Max
—
20.0
—
2.0
tOSC
OSC1, OSC2 50.0 —
500 —
500
1429
System clock (φ) tcyc
cycle time
Subclock oscillation fW
frequency
Watch clock (φW) tW
cycle time
Subclock (φSUB)
cycle time
tsubcyc
Instruction cycle
time
Oscillation
trc
stabilization time
trc
External clock high tCPH
width
External clock low tCPL
width
External clock rise tCPr
time
External clock fall tCPf
time
RES pin low
tREL
width
X1, X2
X1, X2
OSC1,
OSC2
X1, X2
OSC1
OSC1
OSC1
OSC1
RES
2—
128
——
182
— 32.768 —
— 30.5 —
2—
8
2—
—
——
20
——
2.0
20 —
—
20 —
—
——
5
——
5
10 —
—
Unit Test Condition
MHz
On-chip oscillator
selected
ns
On-chip oscillator
selected
tOSC
µs
kHz
µs
tW
tcyc
tsubcyc
ms
s
ns
ns
ns
ns
tcyc
Reference
Figure
*2
Figure 16.2
Figure 16.2
*1
Figure 16.2
Figure 16.2
Figure 16.2
Figure 16.2
Figure 16.3
Rev. 8.00 Mar. 09, 2010 Page 515 of 658
REJ09B0042-0800