HD64F38024HV Datasheet, PDF (316/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 9 Timers
b. With noise cancellation function
When noise cancellation is performed on the input capture input, the passage of the input
capture signal through the noise canceler results in a delay of five sampling clock cycles from
the input capture input signal edge.
Figure 9.12 shows the timing in this case.
Input capture
input signal
Sampling clock
Noise canceler
output
Input capture
signal R
Figure 9.12 Input Capture Input Timing (with Noise Cancellation Function)
Timing of Input Capture by Input Capture Input
Figure 9.13 shows the timing of input capture by input capture input
Input capture
signal
TCG
N-1
N
N+1
Input capture
register
H'XX
N
Figure 9.13 Timing of Input Capture by Input Capture Input
Rev. 8.00 Mar. 09, 2010 Page 294 of 658
REJ09B0042-0800