HD64F38024HV Datasheet, PDF (299/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 9 Timers
TCF Increment Timing
TCF is incremented by clock input (internal clock or external event input).
a. Internal clock operation
Bits CKSH2 to CKSH0 or CKSL2 to CKSL0 in TCRF select one of four internal clock
sources (φ/32, φ/16, φ/4, or φw/4) created by dividing the system clock (φ or φw).
b. External event operation
External event input is selected by clearing CKSL2 to 0 in TCRF. TCF can increment on
either the rising or falling edge of external event input. External event edge selection is set by
IEG3 in the interrupt controller’s IEGR register. An external event pulse width of at least 2
system clocks (φ) is necessary. Shorter pulses will not be counted correctly.
TMOFH/TMOFL Output Timing
In TMOFH/TMOFL output, the value set in TOLH/TOLL in TCRF is output. The output is
toggled by the occurrence of a compare match. Figure 9.6 shows the output timing.
φ
TMIF
(when IEG3 = 1)
Count input
clock
TCF
N
N+1
N
N+1
OCRF
Compare match
signal
TMOFH TMOFL
N
N
Figure 9.6 TMOFH/TMOFL Output Timing
Rev. 8.00 Mar. 09, 2010 Page 277 of 658
REJ09B0042-0800