HD64F38024HV Datasheet, PDF (627/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Appendix B Internal I/O Registers
OSCCR—Clock Pulse Generator Control Register
H'F5 Clock Pulse Generator
Note: This register is implemented on the H8/38124 Group only.
Bit
7
6
SUBSTP ⎯
Initial value
0
0
Read/Write
R/W
R
5
4
3
2
1
0
⎯
⎯
⎯ IRQAECF OSCF ⎯
0
0
0
⎯
⎯
0
R/W R/W R/W
R
R
R/W
OSC Flag
0 Operation using system clock oscillator (on-chip oscillator stopped)
1 Operation using on-chip oscillator (system clock oscillator stopped)
IRQAEC Flag
0 IRQAEC pin set to GND during resets
1 IRQAEC pin set to VCC during resets
Subclock Oscillator Stop Control
0 Subclock oscillator operating (initial value)
1 Subclock oscillator stopped
Rev. 8.00 Mar. 09, 2010 Page 605 of 658
REJ09B0042-0800