HD64F38024HV Datasheet, PDF (274/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 9 Timers
Timer Counter A (TCA)
Bit
Initial value
Read/Write
7
TCA7
0
R
6
TCA6
0
R
5
TCA5
0
R
4
TCA4
0
R
3
TCA3
0
R
2
TCA2
0
R
1
TCA1
0
R
0
TCA0
0
R
TCA is an 8-bit read-only up-counter, which is incremented by internal clock input. The clock
source for input to this counter is selected by bits TMA3 to TMA0 in timer mode register A
(TMA). TCA values can be read by the CPU in active mode, but cannot be read in subactive
mode. When TCA overflows, the IRRTA bit in interrupt request register 1 (IRR1) is set to 1.
TCA is cleared by setting bits TMA3 and TMA2 of TMA to 11.
Upon reset, TCA is initialized to H'00.
Clock Stop Register 1 (CKSTPR1)
Bit:
7
⎯
Initial value: 1
Read/Write: ⎯
6
5
4
3
2
1
0
⎯ S32CKSTP ADCKSTP TGCKSTP TFCKSTP TCCKSTP TACKSTP
1
1
1
1
1
1
1
⎯
R/W
R/W
R/W
R/W
R/W
R/W
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to timer A is described here. For details of the other bits, see the
sections on the relevant modules.
Bit 0—Timer A Module Standby Mode Control (TACKSTP)
Bit 0 controls setting and clearing of module standby mode for timer A.
TACKSTP
0
1
Description
Timer A is set to module standby mode
Timer A module standby mode is cleared
(initial value)
Rev. 8.00 Mar. 09, 2010 Page 252 of 658
REJ09B0042-0800