HD64F38024HV Datasheet, PDF (156/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 5 Power-Down Modes
Operating
mode
Active (high-speed,
medium-speed) mode
or subactive mode
t_cyc
t_cyc
t_subcyc t_subcyc
Wait for Active (high-speed,
Standby mode oscillation medium-speed) mode
or watch mode to settle or subactive mode
t_cyc
t_subcyc
t_cyc
t_subcyc
φ or φ_SUB
External input signal
Capture possible:
case 1
Capture possible:
case 2
Capture possible:
case 3
Capture not
possible
Interrupt by different
signal
Figure 5.3 External Input Signal Capture when Signal Changes before/after
Standby Mode or Watch Mode
4. Input pins to which these notes apply:
IRQ₄, IRQ₃, IRQ₁, IRQ₀, WKP₇ to WKP₀, IRQAEC, TMIC, TMIF, TMIG, ADTRG.
5.4 Watch Mode
5.4.1 Transition to Watch Mode
The system goes from active or subactive mode to watch mode when a SLEEP instruction is
executed while the SSBY bit in SYSCR1 is set to 1 and bit TMA3 in TMA is set to 1.
In watch mode, operation of on-chip peripheral modules is halted except for timer A, timer F,
timer G, AEC and the LCD controller/driver (for which operation or halting can be set) is halted.
As long as a minimum required voltage is applied, the contents of CPU registers, the on-chip
RAM and some registers of the on-chip peripheral modules, are retained. I/O ports keep the same
states as before the transition.
Rev. 8.00 Mar. 09, 2010 Page 134 of 658
REJ09B0042-0800