HD64F38024HV Datasheet, PDF (53/684 Pages) Renesas Technology Corp – Hardware Manual Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series

Section 2 CPU
2.3.2 Memory Data Formats
Figure 2.4 indicates the data formats in memory. The H8/300L CPU can access word data stored
in memory (MOV.W instruction), but the word data must always begin at an even address. If word
data starting at an odd address is accessed, the least significant bit of the address is regarded as 0,
and the word data starting at the preceding address is accessed. The same applies to instruction
codes.
Data Type
Address
Data Format
1-bit data
7
0
Address n 7 6 5 4 3 2 1 0
Byte data
Address n MSB
LSB
Word data ^{Even address MSB}
Upper 8 bits
Odd address
Lower 8 bits
LSB
Byte data (CCR) on stack ^{Even address MSB}
CCR
LSB
Odd address MSB
CCR^*
LSB
Word data on stack ^{Even address MSB}
Odd address
LSB
Note: * Ignored on return
[Legend]
CCR: Condition code register
Figure 2.4 Memory Data Formats
When the stack is accessed using R7 as an address register, word access should always be
performed. When the CCR is pushed on the stack, two identical copies of the CCR are pushed to
make a complete word. When they are restored, the lower byte is ignored.
Rev. 8.00 Mar. 09, 2010 Page 31 of 658
REJ09B0042-0800